1. Field of the Invention
The present invention relates to integrated circuits. It more specifically relates to methods for manufacturing electronic components designated as SON in the art (for Silicon On Nothing).
2. Discussion of the Related Art
MOS transistors are currently formed on an SOI-type substrate (for Silicon On Insulator). Since the cost of this substrate is not negligible, it has been provided to locally form, in a solid substrate, a buried silicon oxide layer under a single-crystal silicon film on which the transistor will be formed.
FIGS. 1A to 4B illustrate successive steps of the forming of a MOS transistor on a portion of a substrate comprising a buried silicon oxide layer.
FIGS. 1A and 1B respectively are a top view and a cross-section view along plane BB of FIG. 1A of an initial manufacturing step. In a solid silicon substrate 1, an insulating ring 2 delimiting an active area 4 has been formed.
At the step illustrated in FIGS. 2A and 2B, which respectively are a top view and a cross-section view along plane BB of FIG. 2A, active area 4 has been etched down to a given depth before the successive epitaxial forming of a silicon-germanium sacrificial layer 6 and of a silicon layer 8 across a thickness corresponding to the etch depth. A gate insulator 12 has been deposited on layer 8, after which a metal gate 10 has been formed. The upper portion of the gate comprises a polysilicon layer 14. Two spacers 16 are formed on either side of gate 10-14. As illustrated in FIG. 2A, gate 10-14 extends on insulating ring 2, on either side of active area 4.
At the step illustrated in FIG. 3B, which is a cross-section view of a next manufacturing step, insulating ring 2 has been etched to be able to access to sacrificial layer 6. Then, layer 6 has been removed. The mechanical resistance of the suspended membrane corresponding to layer 8 is ensured by the extensions of gate 10-14 which bear on insulating ring 2.
At the step illustrated in FIG. 4B, which is a cross-section view of a next manufacturing step, a silicon oxide layer 22 has been deposited under layer 8. A MOS transistor, which is insulated from substrate 1 by layer 22, can then be formed in silicon layer 8. Such a transistor has the same advantages as a transistor formed in the upper silicon layer of an SOI-type structure.
In this example, the selective etching of sacrificial layer 6 over layer 8 is performed after the forming of gate 10-14. A hydrogen chloride gas at high temperature used for this step inevitably etches metal gate 10, which may be a problem. Further, the etch selectivity over spacers 16 and to gate insulator 12 is not perfect.